1. Field of the Invention
The present invention relates to an echo canceller circuit for removing an echo which is produced during an interlocking between a public land mobile network (PLMN) and a public switched telephone network (PSTN). More specifically, the present invention relates to a method for controlling the echo canceller circuit in which a one chip controller is used to control a plurality of digital signal processors (DSP).
2. Description of the Prior Art
During an interlocking between the PLMN and the PSTN, when there is a voice transmission from a PLMN subscriber, the voice of the subscriber is transmitted through the PLMN and the PSTN to a PSTN subscriber. In this process, an echo is generated due to an impedance mismatch in a 2-line/4-line hybrid circuit which is disposed in the PSTN subscriber match portion.
Owing to the voice coding for improving the efficacy of the non-channel feature of the PLMN, the echo is delayed by about 180 ms to return to the PLMN subscriber, thereby causing an inconvenience in the communications. Therefore, a need for removing such an echo has arisen.
The conventional echo canceller circuit for removing the echo includes: a plurality of digital adaptive filters; and a control circuit for controlling them. The control circuit which controls the plurality of the digital adaptive filters includes a plurality of elements, and therefore, the circuit is complicated, as well as being expensive.